What to upload
Upload a PADS Logic or PowerLogic ASCII schematic (`*PADS-LOGIC-*` or `*PADS-POWERLOGIC-*`). A Layout ASCII board is a different input.
Schematic & netlist
PADS Logic file conversion
Recognized Logic ASCII parts and pin connections; sheet graphics and CAE decals are not reconstructed.
In development — results may be incomplete or inaccurate.
What to review
Check part references and net-to-pin connections. Sheet graphics and CAE decals are not converted.
Conversion outputs
These routes depend on supported source contents. Each upload receives its own result and notes. Shared editor engine for supported board and authored schematic profiles. Coverage and independent qualification are reported separately.
- EDA42 project documentsIn development · Supported subset
- KiCad project (board and schematic)In development · Supported subset
- PADS ASCII board and PADS Logic schematicIn development · Supported subset
- Altium Designer (Altium PCB and schematic documents)In development · Supported subset
- DipTrace PCB and schematic XMLIn development · Supported subset
- SVG schematic and board drawingsIn development · Supported subset
- KiCad XML netlist (KiCad S-expression netlist)In development · Supported subset
- Component BOM CSVIn development · Supported subset
- PDF schematic and board drawingsIn development · Supported subset
Unavailable output options (33)
- Gerber + ExcellonIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Eagle (Autodesk Fusion Electronics (Eagle XML board))In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- EasyEDA Standard / Pro (EasyEDA Standard board JSON)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- gEDA PCBIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- CADSTAR PCB ArchiveIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Horizon EDA boardIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Cadence Allegro (Specctra DSN exchange)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- OrCAD Capture (Specctra DSN exchange)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Specctra DSNIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Siemens Xpedition (IDF exchange)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- PADS Logic ASCIIIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- ViewDraw text schematicIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- HyperLynx HYPIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Concept HDL / Design Entry HDL (Concept HDL CPM/CSA)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Allegro text netlistIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- EDIFIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- IDF 3.0 board outline and drillingIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- LibrePCB projectIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- IPC-D-356In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- IPC-2581 XMLIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- GenCADIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- STEPIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- ODB++ ZIP archiveIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Excellon drill packageIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- DXF board layer drawingsIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- Component placement CSVIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- STL triangle meshIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- glTF 3D board modelIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- BREP (Open CASCADE BREP)In development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- PLY polygon meshIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- VRML 3D modelIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- KiCad synthesized connectivity schematicIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.
- LTspice ASCIn development · Unavailable
The source remains in scope. This shared-engine route is not available yet.